 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| A/D, D/C Converters for Image Signal Processing MN65761T Low Power 9-Bit CMOS A/D Converter for Image Processing Overview The MN65761T is a high-speed 9-bit CMOS analogto-digital converter for image processing applications. It uses a half flash structure based on chopper comparators and achieves both high speed and low power consumption with multiplexing. It provides separate power supply pins for the circuits driving the low-voltage digital output pins. Pin Assignment Features Maximum conversion rate: 18 MSPS (min.) Linearity error: 1.3 LSB (typ.) Differential linearity error: 0.6 LSB (typ.) Power supply voltage: 3.6 V or 2.6 V Power consumption: 60 mW (typ.) (fCLK=18 MHz) Digital television receivers Digital video equipment Digital image processing equipment N.C. N.C. AVSS VRTS VRT AVSS AVDD VRM AVDD VIN N.C. N.C. Applications 1 2 3 4 5 6 7 8 9 10 11 12 N.C. N.C. D7 D8 N.C. AVSS AVDD CLK NOE POWD N.C. N.C. 37 38 39 40 41 42 43 44 45 46 47 48 36 35 34 33 32 31 30 29 28 27 26 25 N.C. N.C. D6 D5 D4 DVDDL AVSS D3 D2 D1 N.C. N.C. 24 23 22 21 20 19 18 17 16 15 14 13 N.C. N.C. D0 TEST AVDD AVDD AVSS VRBS VRB AVSS N.C. N.C. (TOP VIEW) TQFP048-P-0707 1 2 MN65761T Block Diagram TEST D0(LSB) D1 D2 D3 AVSS DVDDL D4 D5 D6 D7 D8 40 39 34 33 32 31 30 29 28 27 22 20 19 21 AVDD 31 5 31 Upper comparator (5 bits) Upper encoder (5 bits) AVDD 18 AV SS 17 VRBS 16 VRB 15 AV SS 10 9 8 7 VIN AVDD VRM AVDD 6 AV SS AVSS AVDD CLK NOE POWD 46 45 44 43 42 31 31 5V RT 4 VRTS 3 AV SS A/D, D/C Converters for Image Signal Processing Clock generator 31 5 5 Lower comparator A (4 bits) Lower comparator B (4 bits) Lower encoder A (4 bits) Lower encoder B (4 bits) 31 Error correction and data latch A/D, D/C Converters for Image Signal Processing Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol N.C. N.C. AVSS VRTS VRT AVSS AVDD VRM AVDD VIN N.C. N.C. N.C. N.C. AVSS VRB VRBS AVSS AVDD AVDD TEST D0 N.C. N.C. N.C. N.C. D1 D2 D3 AVSS DVDDL D4 D5 D6 N.C. N.C. N.C. N.C. D7 D8 Function Description No connection No connection Ground for analog circuits Reference voltage power supply (TOP) Reference voltage input (TOP) Ground for analog circuits Power supply for analog circuits Intermediate reference voltage Power supply for analog circuits Analog signal input No connection No connection No connection No connection Ground for analog circuits Reference voltage input (BOTTOM) Reference voltage power supply (BOTTOM) Ground for analog circuits Power supply for analog circuits Power supply for analog circuits Test mode selection Digital code output (LSB) No connection No connection No connection No connection Digital output Digital output Digital output Ground for analog circuits Power supply for low-voltage digital outputs Digital output Digital output Digital output No connection No connection No connection No connection Digital output Digital output (MSB) MN65761T 3 MN65761T Pin Descriptions (continued) Pin No. 41 42 43 44 45 46 47 48 Symbol N.C. AVSS AVDD CLK NOE POWD N.C. N.C. A/D, D/C Converters for Image Signal Processing Function Description No connection Ground for analog circuits Power supply for analog circuits Sampling clock Digital output enable Power down mode selection No connection No connection Ta=25C Absolute Maximum Ratings Parameter Power supply voltage Symbol VDD DVDDL VI VO Topr Tstg Symbol VDD DVDDL VIH VIL VRT VRB tWH tWL VAIN AVSS 25 25 AVSS min 3.15 2.50 AVDD x 0.55 AVSS Rating - 0.3 to +7.0 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 -20 to +70 -55 to +125 Unit V V V V C C Power supply voltage for digital output circuits Input voltage Output voltage Operating ambient temperature Storage temperature Recommended Operating Conditions Parameter Power supply voltage Power supply voltage for digital output circuits Digital input voltage Reference voltage Clock "H" level "L" level "H" level "L" level "H" level pulse width "L" level pulse width Analog input voltage VDD=AVDD=3.6V, DVDDL=2.6V, VSS=AVSS=0V, Ta=25C typ 3.60 2.60 max 3.70 3.70 AVDD AVDD x 0.20 Unit V V V V V V ns ns 3.30 1.30 AVDD AVDD min typ 60 9 1.3 0.6 18 1 2 1.5 10 20 26 35 18 VRT -VRB -1.5 2.5 1.0 max 100 V Unit mW bit LSB LSB MSPS MHz V mA mA ns pF Electrical Characteristics Parameter Power consumption Resolution Linearity error Differential linearity error Maximum conversion rate Clock frequency Analog input dynamic range Output current "H" level "L" level VDD=AVDD=3.6V, DVDDL=2.6V, AVSS=0V, Ta=25C Symbol Conditions PC fCLK=18 MSPS (not including reference current) RES EL ED FC(max.) fCLK DR IOH IOL td CI VDD=3.5V, DVDDL=2.5V fCLK=18MSPS, VDD=3.5V VRT=3.3V, DVDDL=2.5V VRB=1.3V, CLKDuty=505% VDD=3.5V, DVDDL=2.5V VDD=3.5V, DVDDL=2.5V VDD=3.5V, DVDDL=2.5V VOH=DVDDL- 0.8V VOL=0.4V Ta=70C, CL=100+10pF VIN pin Output delay time Analog input capacitance 4 A/D, D/C Converters for Image Signal Processing Timing Chart MN65761T The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital output 2.5 clock cycles later at the rising edge of the clock signal. tWH Clock tWL Analog input N N+1 N-2 td(20ns) N+2 N-1 N+3 N N+4 N+1 Data output N-3 Note: The circles indicate analog signal sampling points. 5 MN65761T Package Dimensions (Unit:mm) TQFP048-P-0707 A/D, D/C Converters for Image Signal Processing 9.000.20 7.000.10 36 25 37 24 (0.75) 7.000.10 48 13 (1.00) (0.75) 0.50 1.20max. 1 12 +0.10 0.20 -0.05 9.000.20 (1.00) 0.125 -0.05 +0.10 0.10 SEATING PLANE 0.100.10 0.500.10 6 0 to 10 |
Price & Availability of MN65761T
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |